Dr. José Joaquín Alvarado Pulido

Profesor Investigador "A" Tiempo Completo

Ext. EcoCampus: 1367

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Present activities

  • Since 01/03/2012, Researcher at the Research Center of Semiconductor Devices (CIDS), Science Institute, Benemérita Universidad Autónoma de Puebla (BUAP), México.
  • Promoter of a group of about 6 researchers, on the following themes:
  • Sensor and microsystems fabrication, simulation and modelling on Thin Film Technology for: biomedical (physiological, bacteria), physical-chemical (photocatalysers, photovoltaic, gas, illumination, radiations).
  •  Characterization, modelling and simulation of nanoelectronics devices for harsh conditions applications (temperature, radiation).
  • Device and analog/digital electronics circuits in Thin Film Transistors.
  • Other activities within BUAP:
  • Academic Secretary of the Postgraduate Program on Semiconductor Devices at CIDS-BUAP.
  • Member of the research group on semiconductor device applications.
  • Teaching:
  • Since 2012; Titular Professor at BUAP, MEMS Design (undergraduate), Modeling and Simulation of Semiconductor Devices  (Master) and Physics of Semiconductor Devices (PhD).
  • Theses promoter:
  • Presented theses: 2 undergraduate and 3 master degrees.
  • On-going theses: 2 master and 7 PhDs students.
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  • Education
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  • 1998-2001 Electronic and Communications Engineer Degree from Technological University of Mexico (UNITEC), Mexico City.
  • 2003-2007 Ph.D. degree from Solid-State Electronics, Department of Electrical Engineering, CINVESTAV-IPN, Mexico City.
  • 2008-2010 Post-Doctoral stay about modeling of multiple gates and radiation effects on SOI circuits at Microelectronics Laboratory, Université catholique de Louvain, Louvain-la-Neuve, Belgium.
  • 2011 Post-Doctoral stay about modeling of multiple gates on SOI circuits working high frequencies at Telecomunications Department of the Universidad Nacional Autónoma de México, México.
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  • Distinctions
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  • Since 2012; Level 1 member of the CONACYT Mexican Researchers System.
  • Since 2012; CONACYT Referee of research projects and postgraduate programs.
  • Since 2014; High Level Researcher Profile from the Mexican Public Education Council.
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  • Grants
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  • 2008-2010 UE Marie Curie grant for Post-Doctoral stay at Microelectronics Laboratory, Université catholique de Louvain, Louvain-la-Neuve, Belgium.
  • 2011 Post-Doctoral grant at the Universidad Nacional Autónoma de México, México.
  • 2012 CONACYT retention grant to be hired by the BUAP for developing a project related with irradiation effects on Multiple Gate Transistors and MEMS.
  • 2013-2015 VIEP-BUAP grant for developing a deep study of radiation effects in advanced transistors as well as in thin film transistors.
  • 2015-2017 FNRS-CONACYT bilateral grant for developing a project entitled “Study Of The Radiation Effects In Advanced MOSFET Architectures”
  • 2014-2015 VIEP-BUAP grant for bilateral project with Brookhaven National Laboratory, USA, for developing a deep study of application of thin film technology in ATLAS project.
  • 2016-2019 RCUK-CONACYT bilateral grant for developing the project: Cost-efficient and radiation-tolerant pixel detectors for ionising radiation based on thin-film technology.
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  • Other Professional experience
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  • Teaching:
  • 2004-2007 Teaching Assistant at Universidad Autónoma del Estado de México, Calculus and Digital Systems Design.
  • 2011 Teaching Assistant at the Universidad Nacional Autónoma de México, Design of Circuits for Communications.
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  • Other External activities
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  • Since 2004 Active IEEE member of the Electron Device Society.
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  • Publications
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  • V. Kilchytska, J. Alvarado, N. Collaert, R. Rooyackers, S. Put, E. Simoen, C. Claeys, D. Flandre, “Gate-edge charges related effects and performance degradation in advanced multiple-gate MOSFETs,” Solid-State Electronics, Vol. 59, pp. 18-24, May 2011.
  • V. Kilchytska, J. Alvarado, O. Militaru, G. Berger and D. Flandre, “Effects of High–Energy Neutrons on Advanced SOI MOSFETs,”Advanced Materials Research, Vol. 276, pp. 95-105, 2011.
  • J. Alvarado, V. Kilchystka, E. Boufouss and D. Flandre, “Characterization and modeling of single event transients in LDMOS-SOI FETs”, Microelectronics Reliability, Vol. 51, pp. 2004-2009, 2011.
  • J. Alvarado, V. Kilchytska, E. Boufouss, B.S. Soto-Cruz y D. Flandre, "A compact model for Single Event Effects in PD SOI sub-micron MOSFETs," Aceptado para ser publicado en IEEE Transactions on Nuclear Science, 2012.
  • J. C. Tinoco, S. Salas, A. G. Martinez-Lopez, J. Alvarado, J. P. Raskin "Impact of Extrinsic Capacitances on FinFET RF Performance", Microwave Theory and Techniques, IEEE Transactions on , vol.61, no.2, pp.833,840, Feb. 2013.
  • M. Cheralathan, E. Contreras, J. Alvarado, A. Cerdeira, B. Iniguez, “Implementation of Nanoscale Double-Gate CMOS Circuits Using Compact Advanced Transport Models”, Microelectronics Journal, vol. 44, Issue 2, pp. 80-85, February 2013.
  • S. I. Garduño, A. Cerdeira, M. Estrada, J. Alvarado, V. Kilchytska and D. Flandre,     “Improved modeling of gate leakage currents for fin–shaped field–effect transistors,” Journal of Applied Physics 113, 124507 (2013).
  • G. Darbandy, T. Gneiting, H. Alius, J. Alvarado, A. Cerdeira and B. Iñiguez, “Automatic parameter extraction techniques in IC-CAP for a compact double gate MOSFET model,” Semiconductor Science and Technology, vol. 28, pp. 55014, 2013.
  • S. Garduño, J. Alvarado, Cerdeira, M. Estrada, V. Kilchytska,D. Flandre, “Gate Leakage Currents Model for FINFETs Implemented in Verilog-A for Electronic Circuits Design,” International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, Vol. , pp . 1099-1204, 2014.
  • Magali Estrada, G. Gutierrez-Heredia, Antonio Cerdiera, Joaquin Alvarado, Ivan Garduño, Julio Tinoco, Israel Mejia, M. Quevedo-Lopez, “Temperature Dependence of the Electrical Characteristics of Low temperature Processed Zinc Oxide Thin Film Transistors,” Thin Solid Films, Vol.573, pp.18-21, 2014.
  • J. Metcalfe, I. Mejia, J. Murphy, M. Quevedo, L. Smith, J. Alvarado, B. Gnade, H. Takai, “Potential of Thin Films for use in Charged Particle Tracking Detectors,” arXiv:1411.1794 [physics.ins-det], 2014.
  • J Alvarado, P Flores, S Romero, F Ávila-Herrera, V González, B S Soto-Cruz and A Cerdeira, “Verilog-A implementation of a double-gate junctionless compact model for DC circuit simulations”,  Semiconductor Science and Technology, Vol. 31, No. 7, pp. 075002, 2016.
  • Victor R. Gonzalez-Diaz, Luis A. Sanchez-Gaspariano, Carlos Muñiz-Montero, Jose J. Alvarado-Pulido, “Improving linearity in MOS varactor based VCOs by means of the output quiescent bias point,” Integration, the VLSI Journal, Volume 55, September 2016, Pages 274-280, 2016.
  • Conferences
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  • J. Alvarado, I. Mejia, S. Garduño, R. Policroniades, H. Lopez, H. Carrasco, J. Aspiazu, J. Metcalfe, H. Takai, S. Soto, M. Quevedo-Lopez and Bruce Gnade, “Effects of Neutron Irradiation on ZnO Thin Films Transistors,” XXIV International Materials Research Congress, Cancun, Mexico 16-20 August 2015.
  • L. Ramirez, J. Alvarado, S. Soto, M. Estrada and A. Cerdeira, “Modeling of a Double Gate Polymeric Thin Film Transistor PTFT”, XXIV International Materials Research Congress, Cancun, Mexico 16-20 August 2015.
  • I. Aguilar, J. Alvarado, S. Soto, S. Alcántara and M. Estrada “Simulation of a Double Gate TFT for sensor applications”, XXIV International Materials Research Congress, Cancun, Mexico 16-20 August 2015.
  • J. Alvarado, V. Kilchytska, A. Cerdeira, S. Soto and D. Flandre “Radiaton Effects on Advanced SOI MOSFETs,” VIII International Conference on Surfaces, Materials and Vacuum, Puebla, Mexico, 21-25 September 2015.
  • K. Álvarez, J. Alvarado, S. Soto and J. Hernández, “Synthesis and Characterization of TiO2 doped with SnO2”, VIII International Conference on Surfaces, Materials and Vacuum, Puebla, Mexico, 21-25 September 2015.